1. Field of the Invention
The present invention relates to a method for driving an AC surface discharge plasma display panel according to an electrode wiring structure.
2. Description of the Related Art
A plasma display panel is a kind of a display for restoring picture data input as an electrical signal by arranging a plurality of discharge tubes in a matrix shape and selectively emitting light from the plurality of discharge tubes. A method for driving the plasma display panel is divided into a DC driving method and an AC driving method according to whether the polarity of a pulse voltage applied in order to maintain the discharge changes as time passes.
FIG. 1 is a sectional view of an opposite orientation discharge structure plasma display panel. FIGS. 2A and 2B are respectively a sectional view and an exploded perspective view of the AC surface discharge structure plasma display panel. As shown in FIGS. 1, 2A, and 2B, a discharge space is formed between upper glass substrates 1 and 7 and lower glass substrates 4 and 12 in the DC opposite orientation discharge structure plasma display panel and the AC surface discharge structure plasma display panel, respectively. Meanwhile, in the DC plasma display panel, the flow of electrons supplied from a negative polarity is a main source of energy for maintaining the discharge since a scanning electrode 2 and an address electrode 5 are directly exposed to a discharge space 3, in the AC plasma display panel, a scanning electrode 6a and a common electrode 6b for maintaining the discharge are electrically isolated from a discharge space 10 since the scanning electrode 6a and the common electrode 6b are in a dielectric layer 8. The discharge is maintained by a well-known wall charge effect in the case of the AC type plasma display panel. Namely, since a discharge starting voltage is an addition of a voltage generated by a wall charge to an applied voltage, discharge occurs only where the wall charge exists. Since the discharge accumulates wall charges, the discharge is maintained in a place where the discharge once occurred.
Also, the plasma display panel is divided into an opposite orientation discharge structure and a surface discharge structure according to the arrangement of the electrodes for generating the discharge. Namely, in the opposite orientation discharge structure, the electrodes for generating the discharge are arranged on different surfaces, i.e., opposite surfaces as shown in FIG. 1. In the surface discharge structure, the electrodes for generating the discharge are arranged on the same surface as shown in FIG. 2A. The respective structures are divided into a two electrode structure and a three electrode structure, etc., according to the number of electrodes installed in order to easily realize a discharge.
FIG. 2B shows a three electrode surface discharge structure of the plasma display panel which is commonly used. An address electrode 11 which faces the scanning electrode 6a and the common electrode 6b which are two display electrodes formed side by side is installed in the discharge space formed by a partition wall. The discharge for generating the wall charge in order to select pixels occurs between the address electrode 11 and the scanning electrode 6a. Then, the discharge for displaying a picture is repeated for a predetermined time between the scanning electrode 6a and the common electrode 6b. A partition wall 17 forms the discharge space and intercepts light generated during the discharge, thus preventing generation of cross talk in adjacent pixels. Each pixel is formed by forming such unit-structure on a substrate and coating fluorescent material on the respective unit structures. These pixels are integrated in a matrix and become a plasma display panel. In the commonly used plasma display panel, the discharge occurs in the respective pixels and ultraviolet rays generated by the discharge excite the fluorescent material coated on the inner wall of the pixel, thus realizing a desired color.
In order for the plasma display panel to exhibit the function of the display panel, gray scales must be realized. In order to realize the gray scales in the plasma display panel, a time division controlling method for dividing one TV field into a plurality of auxiliary fields and displaying the auxiliary fields is used. FIG. 3 is a diagram for describing the gray scale displaying method of the AC type plasma display panel which is currently applied to products. The method is a 6-bit gray scale displaying method, where one TV field is divided into 6 auxiliary fields. Each auxiliary field is divided into address periods A1, A2, . . . , and A6 and sustaining periods S1 S2, S3, . . . , and S6. The pixel of the display panel is selected during the address periods A1, A2, . . . , and A6. The gray scales of the pixel selected during the address periods are displayed during the following sustaining periods S1, S2, S3, . . . , and S6. Accordingly, the gray scales of the pixels are displayed by the combination of the sustaining periods S1, S2, S3, . . . , and S6 selected by addressing. It is possible to display 64 (=26) gray scales by this method. Namely, the pixels selected from the plasma display panel comprised of 480 scan lines Y1, Y2, . . . , and Y480 can display a total of 64 levels, i.e., from level 0 to level 63. For example, the gray scales are displayed as follows, 0(0T), 1(1T), 2(2T), 3(1T+2T), 4(4T), 5(1T+4T), 6(2T+4T), 7(1T+2T+4T), 8(8T), 9(1T+8T), . . . , 27(1T+2T+8T+16T), . . . , 63(1T+2T+4T+8T+16T+32T).
FIG. 4 shows an example of the electrode wiring structure of the commonly used AC type plasma display panel, which is constituted of two electrode pairs (X and Y electrode pairs) which face each other and are parallel to each other in a horizontal direction and address electrodes 21 which are vertical to the X and Y electrode pairs. Here, electrodes which are commonly wired among the two horizontal electrode pairs are common electrodes (X electrodes). The other electrodes are scanning electrodes (Y electrodes). The waveform of a driving signal for driving the AC plasma display panel having such a wiring structure is shown in FIG. 5. The driving signal is used for an address division sustain (ADS) method for separately driving an address discharge and a sustaining discharge. In FIG. 5, the waveforms of the address electrode driving signal A, scanning electrode driving signals Y1, Y2, . . . , Y480, and a common electrode driving signal are shown. Here, only the signal of a first sub field SF1 is shown. A1 shows a first address period. S1 shows a first sustaining period. An address period (the first address period) is comprised of an erase time of an entire erase period A11, an entire write period A12, and an entire erase period A13 and a real address period A14 for actually selecting the pixels. During the erase period A11, a wall charge due to a previous discharge is entirely erased. During the period A12, a new wall charge is entirely written by generating weak discharge for correctly displaying gray scales. During the erase period A13, the written wall charge is entirely erased and the amount of wall charge is appropriately controlled and an appropriate amount is left, thus making the operation of a next auxiliary field harmonious. During the address period (A14), a wall charge is written in the scanning electrode of a selected pixel of the entire screen of the plasma display panel by selective discharge caused by a write pulse between the address electrode and the scanning electrode, which cross each other. The write pulse is an electrical signal into which image information is converted. During the discharge maintaining period (S1), light emission is maintained, namely, image information is realized on a real screen as real gray scales by the discharge caused by continuous sustaining pulses.
However, in the gray scale realizing method of the commonly used plasma display panel, no more than 30% of one frame image display period on the basis of the NTSC level of the 6-bit gray scale is assigned to the sustaining period since the method for driving the address discharge and the sustaining discharge in a separated state is applied. Therefore, brightness is very low, which is a large hindrance to adoption as a general display. Furthermore, when the method is applied to a display of a high definition (HD) level, the sustaining discharge period is lowered to xe2x96xa1 of the current period. Accordingly, the brightness is reduced even further. A method of putting relatively more pulse streams in one sub-field by increasing the frequency of the sustaining pulse and narrowing the width of the sustaining pulse is searched in order to improve the brightness. When the frequency of the sustaining pulse increases, the sustaining pulse streams are temporally adjacent to each other. Accordingly, the space charge caused by the discharge generated by a preceding pulse affects the discharge characteristic of the next discharge, thus making the discharge unstable. Therefore, the increase in brightness comes to have a saturation characteristic. Also, when the width of the sustaining pulse is reduced, a time for converting the space charge generated right after the discharge into the wall charge is relatively shorter, thus increasing the sustaining voltage.
In order to avoid such a problem, an entire screen simultaneous address and sustaining discharge realizing method as shown in FIG. 6 is used instead of the method for driving the address discharge and the sustaining discharge in a separated state. In this method, address pulses 29a, 29b, and 29c are applied to interval periods of sustaining pulses 32 applied to the respective scanning electrodes Y1 Y2, and Y3. Erase pulses 31a and 31b for initialization and scanning pulses 33a, 33b, and 33c for addressing are applied to between the sustaining pulses 32 applied to the scanning electrodes Y1, Y2, and Y3. Then, a certain sustaining period is established. In the gray scale display of this method, one TV frame is entirely used for the sustaining discharge by dividing sub-frames (SF1 through SF8) as shown in FIG. 7. However, this method has many restrictions on determining the insertion timing of the address pulses since the address pulse is inserted between the sustaining pulse and the sustaining pulse. Therefore, the number of scan lines which can be actually displayed is limited. Accordingly, it is difficult to drive the display of the HD level. In order to solve this problem, it is necessary to perform high speed driving such as doubling the speed of driving and tripling the speed of driving. Even in this case, it is not possible to prevent the discharge from becoming unstable due to the increase in the frequency and the sustaining voltage from increasing due to a reduction in the width of the sustaining pulse.
To solve the above problem, it is an objective of the present invention to provide a method for driving an AC plasma display panel where it is possible to leave a margin in the insertion timing of an address pulse inserted between a sustaining pulse and a sustaining pulse and to prevent the frequency or the voltage of the sustaining pulse from increasing by setting address time slots each comprised of a plurality of data pulses between the sustaining pulses and driving a plurality of groups each group having horizontal electrode pairs whose number is the same as that of the address time slots, so as to apply the groups to a method for simultaneously driving addressing and sustaining electrodes, wherein sequentially scanning the address time slots in a plurality of groups.
Accordingly, to achieve the above objective, there is provided an AC plasma display panel driving method for driving a picture of a frame with a realization of gray scales by dividing each horizontal synchronous period into a plurality of periods, sustaining and selectively emitting light during the plurality of periods by sequentially applying a different number of sustaining pulses to scanning electrodes and common electrodes during each divided period in a kxc3x97n matrix AC plasma display panel where k electrode pairs, each of which is comprised of first and second electrodes formed in parallel on each surface of two substrates opposite to each other, are arranged in strips and n third electrodes are arranged in strips to cross the electrode pairs, each of which is comprised of the first and second electrodes, when common wiring groups are formed by wiring an m number of second electrodes into one node as a common electrode and the first electrodes are individually installed as a scanning electrode in the electrode pair, comprising the steps of (a) applying a sustaining pulse to the scanning electrode to alternate with a sustaining pulse applied to the common electrode, (b) setting an address time slot comprised of m data in a temporal marginal period secured to the sustaining pulse applied to m scanning electrodes corresponding to the common electrodes of a common electrode groups, each of which is comprised of m common electrodes, performing addressing by assigning the data of the respective address time slots to the time slots of a plurality of sub fields, and applying one scan pulse to each of the m scanning electrodes so as to be synchronized with the m data, wherein the scan pulses exist above a first bias pulse of a predetermined electric potential applied between the sustaining pulses, and (c) applying a second bias pulse of a predetermined voltage to the common electrodes of each common electrode group in a period when the address time slot which exists between the sustaining pulses exists, simultaneously with the step (b).
In the present invention, it is preferable that the step of applying the same erase pulse in units of m scanning electrodes in the same period between the sustaining pulse and the first bias pulse so that an erase period and a break period exist after an address period comprised of the address time slot period and a sustaining period to which the sustaining pulse is applied in each sub field in the steps (a), (b), and (c) is further comprised. It is preferable that the second bias pulse is continuously applied to between the sustaining pulses applied to the common electrode in the step (c).
Also, in the present invention, the sustaining pulse is preferably applied twice in the step (a). It is preferable that the second bias pulse is continuously applied to between the sustaining pulses applied to the common electrode in the step (c).
Also, in the present invention, the discharge maintaining pulse applied to the common electrode is preferably applied to the scan electrode together with the sustaining pulse applied to the scanning electrode. At this time, it is preferable that the second bias pulse is continuously applied to the common electrode in a period between the sustaining pulses applied to the scanning electrode in the step (c).
Also, in the present invention, the sustaining pulse applied to the scanning electrode is preferably applied to the common electrode together with the sustaining pulse applied to the common electrode. At this time, it is preferable that the second bias pulse is continuously applied to between the sustaining pulses applied to the common electrode in the step (c).